It is known that in standard fabrication processes certain treatments of the wafers of semiconductor material, typically silicon, in which electronic devices are formed, can generate electric potentials on the surface of the wafer such as to damage the active dielectrics of the electronic components during fabrication. In particular, the gate dielectrics of MOS field-effect transistors and the gate dielectrics of programmable non-volatile memory cells (EEPROMs) experience such damage. This can give rise to electronic components with electrical characteristics which are worse than those theoretically obtainable. The treatments which contribute chiefly to this damaging of the dielectrics are those which require the use of plasmas for dry etching or for certain vapor-phase chemical deposition operations (plasma enhanced CVD). Furthermore, the effect of these treatments can vary from point to point on the surface of the wafer on account of intrinsic non-uniformities in the apparatuses in which they are developed, so that the devices obtained have differing characteristics depending on their position on the wafer. This, in turn, may negatively influence the production yield.
Therefore, both the constructors and the users of equipment, in particular that for treatments with plasma, feel the need to be able to employ efficient probes and methods to analyze the behavior of equipment and the alterations induced by the treatment on the dielectric properties of the insulating layers of the wafers treated. A good probe and a good method of assessment should have the following characteristics:
speed of analysis of the measurement, PA1 sensitivity, PA1 capacity to detect alterations of charge both in modulus and in sign, PA1 reproducibility of measurements, PA1 possibility of directly correlating the measured data with the effects of the treatments on devices obtained using the same treatments, PA1 possibility of real-time assessment of geometrical effects, such as for example effects of charging by plasma on two very closely spaced electrical interconnection tracks ("shading effect").
In programmable non-volatile memory cells, of the type consisting of an MOS transistor having a floating gate electrode and a control gate electrode, charge sensors have been used for assessing the uniformity of the potential induced on the wafer by a plasma treatment. For example, a technique is known, described in the publication "CHARM wafer characterization" Reedholm Technical Note TN-1 June 1996, in which EEPROM cells formed on a wafer according to a preset surface distribution pattern, are programmed up to threshold saturation, i.e. such as to determine the maximum conduction threshold of the respective cells. The cells are programmed partly with the maximum positive threshold and partly with the maximum negative threshold.
The wafer is then subjected to a treatment, such as a plasma treatment, in order to assess its effects on the wafer.
The surface terminals (pads) of the cells, in particular those connected to the control gate electrodes, have the function of "antenna" areas, i.e. of collectors of the charge induced by the plasma. In those cells programmed with a positive threshold (electrons stored in the floating gate) any negative potential applied to the control gate during exposure to the plasma may extract electrons from the floating gate and thereby induce a reduction in the threshold voltage. The opposite occurs in those cells programmed to saturation with a negative threshold: a positive plasma potential induces an increase in the threshold voltage.
Next, the threshold voltages of the cells are measured and these are compared with the initial maximum threshold voltages. On the basis of the variations in the measured threshold voltage it is possible in this way to get back to the charging potential applied to the control gate during exposure to the plasma.
The known method described briefly above has the following drawbacks.
The programming of the cells up to the saturation value of the threshold has to be carried out with high voltage values applied between the control gate and the substrate. This engenders a heavy electrical loading of the cell, in particular of the dielectric between floating gate and substrate and of the dielectric between control gate and floating gate, and this may compromise the accuracy and reproducibility of the measurement of the plasma potential.
Since different cells are used to detect positive and negative potentials, in order to have a complete map of the changes in the plasma potential over the surface of the wafer, which are determined by the contributions from the charge carriers, both positive and negative, it is necessary to combine the results of two series of measurements. This constitutes a significant complication of the procedures for processing the data from the measurements.
During exposure to the plasma an EEPROM cell also undergoes, in addition to the effects of the electric potential applied to the control gate, the effects due to bombardment with UV photons which are generated in the actual plasma. As is known, exposure to UV rays engenders a variation in the electron distribution in the floating gate. Consequently, the threshold attained after exposure to the plasma is in reality a value resulting from the sum of the two effects mentioned.
Furthermore, the known method does not allow direct assessment of the effects of exposure to the plasma on actual devices.
Thus, what is needed is a method of the type defined at the outset which does not have the drawbacks of the prior art and thus allows reliable and reproducible measurements, directly delivers the changes in the surface potential in the case of plasma treatments, is able to give accurate results even in the presence of UV radiations during the treatment and enables the measured data to be correlated directly with the effects of the treatment, for example exposure to the plasma, on actual devices.